Explore how modern chip designs are compiled and simulated using open-source tools from the LLVM ecosystem.
This site demonstrates Arcilator, an open-source hardware simulator built on LLVM. When engineers design computer chips, they write code in languages like SystemVerilog (similar to how software engineers write C++ or Python). Before manufacturing a chip, they need to simulate it — run the design on a computer to verify it works correctly.
Traditionally, chip simulation required expensive proprietary software. Arcilator is part of CIRCT (Circuit IR Compilers and Tools), an open-source project that brings modern compiler technology to hardware design.
Arcilator compiles hardware designs through multiple stages, similar to how a C++ compiler works:
SystemVerilog is the industry-standard language for chip design. MLIR (Multi-Level IR) is a compiler framework from Google/LLVM. The Arc dialect is Arcilator's specialized representation optimized for simulation. Finally, LLVM compiles everything to fast native machine code.
For each test below, you can explore:
• Source Code — The original SystemVerilog design
• Intermediate Representations — How the compiler transforms the code at each stage
• Waveforms — Visual traces of signal values over time (like an oscilloscope for digital logic)
The tests come from the UVM (Universal Verification Methodology) test suite, an industry-standard framework for verifying chip designs. Try the interactive demo to run a simulation and see bug diagnosis in action.